All Digital Low-Cost Built-in Defect Testing Strategy for Operational Amplifiers with High Coverage

Michael Sekyere, M. Saikiran, Degang Chen
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引用次数: 4

Abstract

Backed by standards like ISO26262, achieving near 100% defect coverage is becoming a common reliability requirement in the ever-growing automotive industry. However, achieving high defect coverage in an analog circuit has been proven to be a difficult/expensive task even with sophisticated analog and digital testing circuitry. In this work, we present a simple design for testability (DfT) technique that achieves 98% defect coverage for operational amplifiers including Widlar current reference and biasing circuitry. Our robust testing method utilizes purely digital testing circuits and is extremely time-efficient reducing the test cost. The proposed method can be used both at production test and for on-line health monitoring post-deployment to detect zero-time and latent defects. Also, the digital nature of our method presents a way for defect localization through the recorded bit streams. In this work, we also introduce a simple method to detect defects in the Widlar current reference and the bias current circuit. We validate all our results using extensive transistor-level simulations in UMC65nm technology.
高覆盖运算放大器全数字低成本内置缺陷测试策略
在ISO26262等标准的支持下,在不断发展的汽车行业中,实现接近100%的缺陷覆盖率正在成为一种常见的可靠性要求。然而,即使使用复杂的模拟和数字测试电路,在模拟电路中实现高缺陷覆盖率已被证明是一项困难/昂贵的任务。在这项工作中,我们提出了一种简单的可测试性(DfT)技术设计,该技术可为包括Widlar电流基准和偏置电路在内的运算放大器实现98%的缺陷覆盖率。我们强大的测试方法利用纯数字测试电路,非常省时,降低了测试成本。该方法既可用于生产测试,也可用于部署后的在线健康监测,以检测零时间缺陷和潜在缺陷。此外,该方法的数字特性提供了一种通过记录的比特流进行缺陷定位的方法。在本工作中,我们还介绍了一种检测威德勒基准电流和偏置电流电路缺陷的简单方法。我们在UMC65nm技术中使用广泛的晶体管级模拟验证了所有结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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