Managing the bottlenecks of a parallel Gauss-Seidel algorithm for power flow analysis

Abstract

The parallelization and implementations of Gauss-Seidel (G-S) algorithms for power flow analysis have been investigated on a Sequent Balance shared memory (SM) machine. In this paper, the authors generalize the idea to more general computer architectures and demonstrate how to effectively increase the speedup upper bounds of G-S algorithms by properly managing the bottlenecks.<>