Efficient deblocking filter implementation on reconfigurable processor

K. Maiti, Sirish Kumar Pasupuleti, R. Gadde, Sang-Jo Lee
{"title":"Efficient deblocking filter implementation on reconfigurable processor","authors":"K. Maiti, Sirish Kumar Pasupuleti, R. Gadde, Sang-Jo Lee","doi":"10.1109/ICASSP.2016.7471836","DOIUrl":null,"url":null,"abstract":"As world is moving towards Ultra High Definition (UHD) content and display technology, high quality visual content is becoming a necessity. Deblocking filter is one of the tools used in today's video coding standards to enhance the quality of compressed video. Deblocking consumes significant percentage (~20%-33%) of total decoding cycles. Therefore, many decoder implementations tend to offload deblocking operation to additional hardware IP block or GPU to achieve real-time performance. However, hardware IP increases die area and lacks flexibility; on other hand GPUs are power hungry. In this paper, we present a reconfigurable processor based software solution along with a deblocking specific intrinsic catering to wide range of video coding standards for handling this performance bottleneck. Our experimental results show, proposed approach improves deblocking performance by a factor greater than 10 and results in processing time in the order of 140 ms for 4K UHD HEVC (60 fps, 30 mbps) stream.","PeriodicalId":165321,"journal":{"name":"2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASSP.2016.7471836","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

As world is moving towards Ultra High Definition (UHD) content and display technology, high quality visual content is becoming a necessity. Deblocking filter is one of the tools used in today's video coding standards to enhance the quality of compressed video. Deblocking consumes significant percentage (~20%-33%) of total decoding cycles. Therefore, many decoder implementations tend to offload deblocking operation to additional hardware IP block or GPU to achieve real-time performance. However, hardware IP increases die area and lacks flexibility; on other hand GPUs are power hungry. In this paper, we present a reconfigurable processor based software solution along with a deblocking specific intrinsic catering to wide range of video coding standards for handling this performance bottleneck. Our experimental results show, proposed approach improves deblocking performance by a factor greater than 10 and results in processing time in the order of 140 ms for 4K UHD HEVC (60 fps, 30 mbps) stream.
在可重构处理器上实现高效的去块滤波器
随着世界向超高清(UHD)内容和显示技术的发展,高质量的视觉内容成为一种必需品。去块滤波是当今视频编码标准中用于提高压缩视频质量的工具之一。解码消耗了总解码周期的很大一部分(~20%-33%)。因此,许多解码器实现倾向于将解块操作卸载到额外的硬件IP块或GPU上,以实现实时性能。然而,硬件IP增加了芯片面积,缺乏灵活性;另一方面,gpu非常耗电。在本文中,我们提出了一种基于可重构处理器的软件解决方案,以及一种针对广泛视频编码标准的块化特性,以处理这一性能瓶颈。实验结果表明,该方法可将4K UHD HEVC (60 fps, 30 mbps)流的块阻塞性能提高10倍以上,处理时间约为140 ms。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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