Improving linearity of a 5.2 GHz low power mixer in 0.18μm CMOS process by using Derivative Superposition method

Abstract

This paper describes the design and implementation of a low power mixer improved its linearity. The mixer which have implemented is based on bulk-driven mixer which is known for its low power operation. On the other hand, that mixer has a demerit of poor linearity. The architecture of the proposed mixer employs DS (Derivative Superposition) method to achieve high linearity remaining in low power consumption. The proposed design has been fabricated using TSMC 0.18μm CMOS process. The measured IIP3 shows 6.38 dBm. A conversion gain shows -7.49 dB, and power consumption of 3.54 mW.