A Bidirectional Brain Computer Interface with 64-Channel Recording, Resonant Stimulation and Artifact Suppression in Standard 65nm CMOS

J. Uehlin, W. A. Smith, V. R. Pamula, S. Perlmutter, V. Sathe, J. Rudell
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引用次数: 3

Abstract

A single-chip bidirectional brain-computer interface (BBCI) enables neuromodulation through simultaneous neural recording and stimulation. This paper presents a prototype BBCI ASIC including a 64-channel time-multiplexed recording front-end, 4-channel high-voltage compliant resonant-stimulator and electronics to support concurrent multi-channel differential- and common-mode stimulus artifact cancellation. A cascaded charge pump-based stimulation driver provides +/-11V compliance using 1.2V devices. High-frequency (~3GHz), self-resonant clocking is used to reduce capacitor area while suppressing associated switching losses. A 32-tap LMS-based digital adaptive filter achieves 60-dB artifact suppression, enabling simultaneous neural stimulation and recording. The entire chip is powered by 2.5/1.2V supplies, dissipating 205µW in recording, 142µW in the cancellation back-end, and 31% DC-DC efficiency in the stimulation drivers, each with a maximum output power of 24mW. This 4mm2 neural interface chip was implemented in 65nm 1P9M LP CMOS.
基于标准65nm CMOS的64通道记录、共振刺激和伪影抑制的双向脑机接口
单芯片双向脑机接口(BBCI)通过同时记录和刺激神经来实现神经调节。本文提出了一个BBCI ASIC原型,包括一个64通道时间复用记录前端,4通道高压兼容谐振刺激器和电子设备,以支持并发多通道差分和共模刺激伪影消除。基于级联电荷泵的刺激驱动器使用1.2V设备提供+/-11V的合规性。高频(~3GHz)自谐振时钟用于减少电容器面积,同时抑制相关的开关损耗。基于lms的32分接数字自适应滤波器实现60db伪影抑制,同时实现神经刺激和记录。整个芯片由2.5/1.2V电源供电,记录功耗为205µW,取消后端功耗为142µW,激励驱动器的DC-DC效率为31%,每个驱动器的最大输出功率为24mW。该4mm2神经接口芯片采用65nm 1P9M LP CMOS实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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