{"title":"Computer-aided design of self-testable VLSI circuits","authors":"J. Kalinowski, A. Albicki","doi":"10.1109/CMPEUR.1988.4964","DOIUrl":null,"url":null,"abstract":"The authors present the computer-aided self-test system, a CAD tool for designing of self-testable VLSI circuits. Given a register-transfer-level circuit graph and test requirements, CAST augments the circuit with features that make it self-testable. The objective of the CAST procedures is to maximize built-in test hardware in obtained designs. They give an example that illustrates the CAST design process. The CAST system can be easily extended to incorporate other high-level BIST (built-in self-test) techniques, such as the circular self-test path.<<ETX>>","PeriodicalId":415032,"journal":{"name":"[Proceedings] COMPEURO 88 - System Design: Concepts, Methods and Tools","volume":"75 2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] COMPEURO 88 - System Design: Concepts, Methods and Tools","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMPEUR.1988.4964","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The authors present the computer-aided self-test system, a CAD tool for designing of self-testable VLSI circuits. Given a register-transfer-level circuit graph and test requirements, CAST augments the circuit with features that make it self-testable. The objective of the CAST procedures is to maximize built-in test hardware in obtained designs. They give an example that illustrates the CAST design process. The CAST system can be easily extended to incorporate other high-level BIST (built-in self-test) techniques, such as the circular self-test path.<>