How to Prevent a Sick ASIC

W. Ellersick
{"title":"How to Prevent a Sick ASIC","authors":"W. Ellersick","doi":"10.1109/HPEC55821.2022.9926305","DOIUrl":null,"url":null,"abstract":"High performance computing systems increasingly require mixed-signal ASICs to achieve competitive speed, power efficiency and cost. The integration of processing, transceivers, sensors and power management results in dramatic reductions in size, which can yield great savings in power, enabling higher performance. However, few design elements demand such high quality as a mixed-signal ASIC. In this paper, actual near-disasters from decades of integrated circuit design are presented along with methods to prevent potentially severe damage to projects, careers, and even companies. Such stories of failure are rarely told, but acknowledging them is crucial to avoid repeating the mistakes and to reduce ASIC development risk to ultimately ensure success. Key takeaways include planning for failure with designed-in observability, controllability and workarounds; the use of simple and robust circuits; and that organizing the people can be as challenging and important as arranging the transistors.","PeriodicalId":200071,"journal":{"name":"2022 IEEE High Performance Extreme Computing Conference (HPEC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE High Performance Extreme Computing Conference (HPEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPEC55821.2022.9926305","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

High performance computing systems increasingly require mixed-signal ASICs to achieve competitive speed, power efficiency and cost. The integration of processing, transceivers, sensors and power management results in dramatic reductions in size, which can yield great savings in power, enabling higher performance. However, few design elements demand such high quality as a mixed-signal ASIC. In this paper, actual near-disasters from decades of integrated circuit design are presented along with methods to prevent potentially severe damage to projects, careers, and even companies. Such stories of failure are rarely told, but acknowledging them is crucial to avoid repeating the mistakes and to reduce ASIC development risk to ultimately ensure success. Key takeaways include planning for failure with designed-in observability, controllability and workarounds; the use of simple and robust circuits; and that organizing the people can be as challenging and important as arranging the transistors.
如何预防ASIC生病
高性能计算系统越来越需要混合信号asic来实现具有竞争力的速度、功率效率和成本。处理器、收发器、传感器和电源管理的集成大大减小了尺寸,从而大大节省了功耗,实现了更高的性能。然而,很少有设计元素需要像混合信号ASIC这样的高质量。本文介绍了几十年来集成电路设计中实际的近乎灾难,以及防止对项目、职业甚至公司造成潜在严重损害的方法。这种失败的故事很少被讲述,但承认它们对于避免重复错误和降低ASIC开发风险以最终确保成功至关重要。关键要点包括:设计可观察性、可控性和变通方案来应对失败;采用简单、稳健的电路;组织人员和安排晶体管一样具有挑战性和重要性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信