{"title":"How to Prevent a Sick ASIC","authors":"W. Ellersick","doi":"10.1109/HPEC55821.2022.9926305","DOIUrl":null,"url":null,"abstract":"High performance computing systems increasingly require mixed-signal ASICs to achieve competitive speed, power efficiency and cost. The integration of processing, transceivers, sensors and power management results in dramatic reductions in size, which can yield great savings in power, enabling higher performance. However, few design elements demand such high quality as a mixed-signal ASIC. In this paper, actual near-disasters from decades of integrated circuit design are presented along with methods to prevent potentially severe damage to projects, careers, and even companies. Such stories of failure are rarely told, but acknowledging them is crucial to avoid repeating the mistakes and to reduce ASIC development risk to ultimately ensure success. Key takeaways include planning for failure with designed-in observability, controllability and workarounds; the use of simple and robust circuits; and that organizing the people can be as challenging and important as arranging the transistors.","PeriodicalId":200071,"journal":{"name":"2022 IEEE High Performance Extreme Computing Conference (HPEC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE High Performance Extreme Computing Conference (HPEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPEC55821.2022.9926305","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
High performance computing systems increasingly require mixed-signal ASICs to achieve competitive speed, power efficiency and cost. The integration of processing, transceivers, sensors and power management results in dramatic reductions in size, which can yield great savings in power, enabling higher performance. However, few design elements demand such high quality as a mixed-signal ASIC. In this paper, actual near-disasters from decades of integrated circuit design are presented along with methods to prevent potentially severe damage to projects, careers, and even companies. Such stories of failure are rarely told, but acknowledging them is crucial to avoid repeating the mistakes and to reduce ASIC development risk to ultimately ensure success. Key takeaways include planning for failure with designed-in observability, controllability and workarounds; the use of simple and robust circuits; and that organizing the people can be as challenging and important as arranging the transistors.