A flash EEPROM cell with self-aligned trench transistor and isolation structure

Abstract

For future high-density contactless-NOR-type flash EEPROMs, a new memory cell with self-aligned trench transistor and isolation structure has been proposed, and its feasibility was demonstrated. The short channel effect was suppressed markedly down to the feature size (F) of 0.14 /spl mu/m with the tunnel oxide thickness of 9 nm, and excellent endurance performance (>10/sup 5/ Fowler-Nordheim write/erase cycles) of the memory cell with the area of 0.16 /spl mu/m/sup 2/ (8F/sup 2/, F=0.14 /spl mu/m) was realized.