J. Hwang, J. Ho, Y. Liu, J.J. Shen, W. Chen, D. Chen, W. Liao, Y. S. Hsieh, W. Lin, C. Hsu, H. Lin, M.F. Lu, A. Kuo, S. Huang-Lu, H. Tang, D. Chen, W. Shiau, K. Liao, S. Sun
{"title":"Symmetrical 45nm PMOS on [110] substrate with excellent S/D extension distribution and mobility enhancement","authors":"J. Hwang, J. Ho, Y. Liu, J.J. Shen, W. Chen, D. Chen, W. Liao, Y. S. Hsieh, W. Lin, C. Hsu, H. Lin, M.F. Lu, A. Kuo, S. Huang-Lu, H. Tang, D. Chen, W. Shiau, K. Liao, S. Sun","doi":"10.1109/VLSIT.2004.1345410","DOIUrl":null,"url":null,"abstract":"For the first time, 45 nm PMOS devices on the only 4-fold symmetry zone of [110] surface substrates were demonstrated with excellent diffusion control in the S/D extension region. A 30% drive current enhancement was observed compared to devices on conventional (100) substrates with <110> channel. Resistance to gate oxide interface generation induced by charge injection stress is increased by 2 times. Improved 1/f noise characteristics were also observed on [110] surface substrates, especially when devices operate at the linear region.","PeriodicalId":297052,"journal":{"name":"Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004.","volume":"58 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2004.1345410","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
For the first time, 45 nm PMOS devices on the only 4-fold symmetry zone of [110] surface substrates were demonstrated with excellent diffusion control in the S/D extension region. A 30% drive current enhancement was observed compared to devices on conventional (100) substrates with <110> channel. Resistance to gate oxide interface generation induced by charge injection stress is increased by 2 times. Improved 1/f noise characteristics were also observed on [110] surface substrates, especially when devices operate at the linear region.