Accelerating Large Garbled Circuits on an FPGA-enabled Cloud

M. Leeser, Mehmet Güngör, Kai Huang, Stratis Ioannidis
{"title":"Accelerating Large Garbled Circuits on an FPGA-enabled Cloud","authors":"M. Leeser, Mehmet Güngör, Kai Huang, Stratis Ioannidis","doi":"10.1109/H2RC49586.2019.00008","DOIUrl":null,"url":null,"abstract":"Garbled Circuits (GC) is a technique for ensuring the privacy of inputs from users and is particularly well suited for FPGA implementations in the cloud where data analytics is frequently run. Secure Function Evaluation, such as that enabled by GC, is orders of magnitude slower than processing in the clear. We present our best implementation of GC on Amazon Web Services (AWS) that implements garbling on Amazon’s FPGA enabled F1 instances. In this paper we present the largest problems garbled to date on FPGA instances, which includes problems that are represented by over four million gates. Our implementation speeds up garbling 20 times over software over a range of different circuit sizes.","PeriodicalId":413478,"journal":{"name":"2019 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)","volume":"204 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/H2RC49586.2019.00008","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

Garbled Circuits (GC) is a technique for ensuring the privacy of inputs from users and is particularly well suited for FPGA implementations in the cloud where data analytics is frequently run. Secure Function Evaluation, such as that enabled by GC, is orders of magnitude slower than processing in the clear. We present our best implementation of GC on Amazon Web Services (AWS) that implements garbling on Amazon’s FPGA enabled F1 instances. In this paper we present the largest problems garbled to date on FPGA instances, which includes problems that are represented by over four million gates. Our implementation speeds up garbling 20 times over software over a range of different circuit sizes.
在支持fpga的云上加速大型乱码电路
乱码电路(GC)是一种确保用户输入隐私的技术,特别适合经常运行数据分析的云中的FPGA实现。安全函数评估,比如由GC启用的,要比clear中的处理慢几个数量级。我们在Amazon Web Services (AWS)上展示了我们最好的GC实现,它在Amazon的FPGA支持的F1实例上实现了乱码。在本文中,我们提出了迄今为止在FPGA实例上混淆的最大问题,其中包括由超过400万个门表示的问题。我们的实现在不同的电路尺寸范围内比软件加快了20倍的乱码。
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