MPW implementation of integer-pixel motion estimation circuit for 1080HD video encoder

Abstract

We propose a new H.264 integer-pixel motion estimation algorithm and circuit architecture to improve the processing speed. The proposed circuit supports 7 kinds of variable block sizes and generates 41 motion vectors. Our circuit based on the proposed algorithm and architecture processes 60 image frames per second for 1080HD video at the operating frequency of 45.5MHz. We implemented an MPW chip using 180nm standard cell library for silicon verification.