Performance modeling and enhancement in real-time data flow architectures

Abstract

The authors are concerned with performance modeling and enhancement for periodic execution of large-grain, decision-free algorithms in data flow architectures operating in real-time. The mapping of real-time algorithms onto data flow architectures is realized by a marked graph model called ATAMM (algorithm to architecture mapping model). Applications include control, surveillance, and signal processing problems. Performance is characterized by computing speed and throughput. Bounds on performance measures are established. A technique for transforming an algorithm to improve throughput while maintaining input-output equivalence is presented. The state equations of a linear time invariant system are modified to illustrate the throughput enhancement technique.<>