Optimal gate length estimation of iFinFET

Abstract

i-FinFET, an evolutionary FinFET design, offers better short channel performance. In this work, the scaling characteristics of the iFinFET and FinFET are studied using 3D TCAD simulations based on their ION/IOFF ratio. It is found that the better performance in iFinFET is achieved only below certain gate length. The gate length below which the iFinFET shows better performance is called optimal gate length, and the optimal gate length is a function of various geometrical and doping parameters. In this study, we have derived an empirical relation for the optimal gate length in terms of gate oxide thickness, fin width, and fin height.