Low-Power K-Band LNA in 45 nm SOI CMOS

Abstract

This work presents a low-power K-band single stage cascode low-noise amplifier (LNA) realized in a 45 nm silicon-on-insulator (SOI) CMOS technology. The circuit uses a tapped-inductor resonator for impedance transformation to achieve simultaneously high gain and good output matching. Furthermore, thanks to a careful floorplaning and the proposed arrangement of inductor terminals, the interconnect losses are minimized. The amplifier achieves a gain of 10.7 dB and a noise Figure of 1.6 dB at the center frequency of 20.5 GHz. The circuit achieves a wide 3 dB bandwidth of 15-27 GHz and a linearity of 10.3 dBm input-referred 1 dB compression point. The LNA consumes only 6 mA from a single 1 V supply. The chip size including the pads is only 0.18 mm2. The presented LNA achieves a very competitive performance compared to the state of the art.