Carafe: an inductive fault analysis tool for CMOS VLSI circuits

Abstract

Traditional fault models for testing CMOS VLSI circuits do not take into account the actual mechanisms that precipitate faults in CMOS circuits. As a result, tests based on traditional fault models may not detect all the faults that occur in the circuit. This paper discusses the Carafe software package which determines which faults are likely to occur in a circuit based on the circuit's physical design, defect parameters, and fabrication technology.<>