{"title":"HW/SW Codesign and Implementation of an IMU Navigation Filter on Zynq SoC with Linux","authors":"R. Yeniceri, Yakup Hüner","doi":"10.1109/ICEEE49618.2020.9102597","DOIUrl":null,"url":null,"abstract":"In this paper, a complementary filter for pitch and roll angle estimation based on linear acceleration and angular rate is designed and implemented on a Xilinx Zynq System on Chip (SoC) device. The filter is partitioned into two parts as hardware (HW) and software (SW) as a result of the communication performance analysis of Advanced eXtensible Interface (AXI) bus for a parallel interface in the Programmable Logic (PL) part of the SoC. PetaLinux operates on the Processing System (PS) part of the SoC and runs a C application. PL performs the HW abstraction by transforming serial inputs/outputs with noise rejection filters into memory mapped variables. Real-time test results and SoC utilization results are reported.","PeriodicalId":131382,"journal":{"name":"2020 7th International Conference on Electrical and Electronics Engineering (ICEEE)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 7th International Conference on Electrical and Electronics Engineering (ICEEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEEE49618.2020.9102597","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
In this paper, a complementary filter for pitch and roll angle estimation based on linear acceleration and angular rate is designed and implemented on a Xilinx Zynq System on Chip (SoC) device. The filter is partitioned into two parts as hardware (HW) and software (SW) as a result of the communication performance analysis of Advanced eXtensible Interface (AXI) bus for a parallel interface in the Programmable Logic (PL) part of the SoC. PetaLinux operates on the Processing System (PS) part of the SoC and runs a C application. PL performs the HW abstraction by transforming serial inputs/outputs with noise rejection filters into memory mapped variables. Real-time test results and SoC utilization results are reported.