{"title":"III-V Quantum Well Field Effect Transistors on Silicon for Future High Performance and Low Power Logic Applications","authors":"G. Dewey, M. Radosavljevic, N. Mukherjee","doi":"10.1109/CSICS.2011.6062431","DOIUrl":null,"url":null,"abstract":"This work summarizes the advantages and challenges of III-V channel transistors for high performance and low power logic applications with respect to Si CMOS. The challenge of heterogeneous integration of III-V on Si is addressed by integration of In0.7Ga0.3As QWFETs on Si substrates with a total composite buffer thickness successfully scaled down to 1.3um. The main advantages are demonstrated with Schottky-Gate In0.7Ga0.3As QWFET on Si substrate showing 4.6X to 3.3X effective velocity gain over Si n-MOSFET for a VCC range of 0.5V to 1.0V, and 65% intrinsic drive current gain over Si nMOSFET at VCC = 0.5V. In addition, the challenge of further scaling and reduction of the high gate leakage that occurs in Schottky-gate devices is addressed by successful integration of an advanced composite high-K gate stack in the In0.7Ga0.3As QWFET.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2011.6062431","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This work summarizes the advantages and challenges of III-V channel transistors for high performance and low power logic applications with respect to Si CMOS. The challenge of heterogeneous integration of III-V on Si is addressed by integration of In0.7Ga0.3As QWFETs on Si substrates with a total composite buffer thickness successfully scaled down to 1.3um. The main advantages are demonstrated with Schottky-Gate In0.7Ga0.3As QWFET on Si substrate showing 4.6X to 3.3X effective velocity gain over Si n-MOSFET for a VCC range of 0.5V to 1.0V, and 65% intrinsic drive current gain over Si nMOSFET at VCC = 0.5V. In addition, the challenge of further scaling and reduction of the high gate leakage that occurs in Schottky-gate devices is addressed by successful integration of an advanced composite high-K gate stack in the In0.7Ga0.3As QWFET.