Investigation and analysis into device optimization for attaining efficiencies in-excess of 90% when accounting for higher harmonics

Abstract

A rigorous, systematic, measurement-founded approach is presented that enables the design of highly efficient power amplifiers. The identified process allows the designer to quickly identify the parameters necessary for completion of a design whilst ascertaining their flexibility and impact on performance degradation. The investigation continues to consider the impact of the higher harmonics and gate bias as design tools on the performance of the design and proposes a strategy that utilizes their positive effect as well as considering the subsequent impact on device scaling. This was carried out on GaAs pHEMT devices from commercial processes that obtained measured peak efficiencies of 90.1% at P1dB in a class-B bias.