{"title":"Library tuning for subthreshold operation","authors":"Bo Liu, J. P. de Gyvez, M. Ashouei","doi":"10.1109/SUBVT.2012.6404313","DOIUrl":null,"url":null,"abstract":"In this paper, the authors extend their work on the balancing-based subthreshold cell sizing methodology. The libraries were benchmarked against a library tuned for super-threshold operation. Two sets of standard cells have been properly sized for operation at 0.3V, and further characterized at different voltages. A super-threshold 90 nm low power library was chosen as a reference library to compare timing, power and voltage scaling ability. The resented libraries show a 31% timing improvement at 0.3 V without area penalty over the conventional library. The comparison of libraries at different voltages shows that with respect to the super-threshold library, the presented library with only transistor channel width tuning has on average 10% better timing from 0.3 V to 1.2 V, and that this library with both transistor channel width and length tuning show timing improvements of 31.4% and 6.9% when the supply voltage increases from 0.3 V to 0.6 V, respectively.","PeriodicalId":383826,"journal":{"name":"2012 IEEE Subthreshold Microelectronics Conference (SubVT)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Subthreshold Microelectronics Conference (SubVT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SUBVT.2012.6404313","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
In this paper, the authors extend their work on the balancing-based subthreshold cell sizing methodology. The libraries were benchmarked against a library tuned for super-threshold operation. Two sets of standard cells have been properly sized for operation at 0.3V, and further characterized at different voltages. A super-threshold 90 nm low power library was chosen as a reference library to compare timing, power and voltage scaling ability. The resented libraries show a 31% timing improvement at 0.3 V without area penalty over the conventional library. The comparison of libraries at different voltages shows that with respect to the super-threshold library, the presented library with only transistor channel width tuning has on average 10% better timing from 0.3 V to 1.2 V, and that this library with both transistor channel width and length tuning show timing improvements of 31.4% and 6.9% when the supply voltage increases from 0.3 V to 0.6 V, respectively.