{"title":"Core Mapping into an Irregular Network on Chip - Features Extraction System for Automatic Speech Recognition Case Study","authors":"P. Dziurzański, T. Maka","doi":"10.1109/PDP.2013.79","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a mapping scheme of IP cores into irregular Network on Chips using an example module dedicated to features extraction for automatic speech recognition system. We estimated the core sizes for various frame sizes and overlappings, and then tried to place cores communicating heavily close to each other, we test a number of widths in the 2D Rectangular Strip Packing problem. The obtained result range allows us to pick a solution that is beneficial both in terms of area and transfers between the system cores.","PeriodicalId":202977,"journal":{"name":"2013 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing","volume":"152 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PDP.2013.79","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we propose a mapping scheme of IP cores into irregular Network on Chips using an example module dedicated to features extraction for automatic speech recognition system. We estimated the core sizes for various frame sizes and overlappings, and then tried to place cores communicating heavily close to each other, we test a number of widths in the 2D Rectangular Strip Packing problem. The obtained result range allows us to pick a solution that is beneficial both in terms of area and transfers between the system cores.