ESL design of customizable real-time neuron networks

Abstract

In this paper, we present the design and implementation of an Inferior-Olivary Nucleus (ION) network on an FPGA device. Compared with existing neuron networks, the proposed design allows to easily customize the network topology and implement existing as well as ad-hoc topologies, in order to explore different levels of connectivities between the cells. Starting from the model of an ION cell, the model has been optimized and an ION network has been designed and implemented in multiple steps. By using the Xilinx Vivado Suite, the design has been synthesized and mapped on a Virtex 7 XC7VX550T FPGA device. Experimental results show that a network of 48 ION cells can be simulated in brain real-time using double floating-point arithmetic, which allows to precisely simulate the network's behavior.