A DSM-based Polar Transmitter with 23.8% System Efficiency

Yuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, A. Shirane, K. Okada
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Abstract

An energy efficient digital polar transmitter (TX) based on 1.5bit Delta-Sigma modulator (DSM) and fractional-N injection-locked phase-locked loop (IL-PLL) is proposed. In the proposed TX, redundant charge and discharge of turned-off capacitors in the conventional switched-capacitor power amplifiers (SCPAs) are avoided, which drastically improves the efficiency at power back-off. In the PLL, spur-mitigation technique is proposed to reduce the frequency mismatch between the oscillator and the reference. The transmitter, implemented in 65nm CMOS, achieves a PAE of 29% at an EVM of -25.1dB, and a system efficiency of 23.8%.
基于dsm的极态发射机,系统效率为23.8%
提出了一种基于1.5位Delta-Sigma调制器(DSM)和分数n注入锁相环(IL-PLL)的高能效数字极极发射机(TX)。该电路避免了传统开关电容功率放大器(scpa)中关断电容的冗余充放电,极大地提高了关断时的效率。在锁相环中,为了减小振荡器与基准之间的频率不匹配,提出了杂散抑制技术。该发射器采用65nm CMOS实现,在EVM为-25.1dB时,PAE为29%,系统效率为23.8%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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