Analysis of electrical properties in MOS structure with a low surface roughness Al2O3-doped ZnO film as gate oxide

Chih-Feng Yen, Yu-Ya Huang, Shen-Hao Tsao, H. Hsu
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引用次数: 1

Abstract

This experiment, liquid phase deposition (LPD) was used to deposit a Zinc Oxide thin film and doped with Al2O3 as a dielectric layer on a P-type silicon substrate to fabricate a metal-oxide-semiconductor (MOS) capacitor. Discuss the effect of doping different volumes of Al2O3 (0, 1, 3, 5 ml) on the electrical properties of the film. Appropriate doping of Al2O3 can reduce the surface roughness of the film. According to the experimental data, it has better electrical properties when doped with 3 ml of Al2O3 and vacuum annealed at 700°C for 1 hour. According to the experimental results, oxide layer charge, dielectric constant, equivalent oxide thickness (EOT), density of interface traps (Dit), leakage current density and average roughness are 213.3 pF, 65.3, 11.45 nm, 4.25 × 1011 cm-2eV-1, 3.18 × 10-5 A/cm2 at +5 V and 1.59 nm. A higher k value can effectively reduce the direct tunneling leakage current under the trend of smaller and smaller components in the future.
以低表面粗糙度al2o3掺杂ZnO薄膜作为栅极氧化物的MOS结构电学性能分析
本实验采用液相沉积法(LPD)在p型硅衬底上沉积氧化锌薄膜并掺杂Al2O3作为介电层,制备金属氧化物半导体(MOS)电容器。讨论了掺杂不同体积Al2O3(0、1、3、5 ml)对薄膜电性能的影响。适当的Al2O3掺杂可以降低膜的表面粗糙度。实验数据表明,掺3ml Al2O3, 700℃真空退火1小时后,具有较好的电学性能。实验结果表明,在+5 V和1.59 nm下,氧化层电荷、介电常数、等效氧化层厚度(EOT)、界面阱密度(Dit)、漏电流密度和平均粗糙度分别为213.3 pF、65.3、11.45 nm、4.25 × 1011 cm-2eV-1、3.18 × 10-5 A/cm2。在未来元件越来越小的趋势下,较高的k值可以有效降低直接隧道漏电流。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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