A study of the high speed driving scheme for HDTV grade AC PDP

Abstract

To achieve high speed addressing for a HDTV grade plasma display, optimization of the timing pulses of priming and addressing have been made. Space charge control pulses were applied to address electrodes to prevent a sustaining voltage hike for high frequency sustaining. As a result, addressing of address pulse width 1 /spl mu/s has been realized and a 10 V voltage reduction in sustain pulse of width 1.8 /spl mu/s has been achieved. An image of 256/spl times/160 pixels with 8 bit gray scale could be displayed. Luminance of 560 cd/m/sup 2/ and background luminance of 0.58 cd/m/sup 2/ have been achieved by one priming discharge in one TV field.