Efficient reconfiguration of WSI arrays

Abstract

A new technique for efficient reconfiguration of large VLSI arrays suitable for wafer-scale integration (WSI) is introduced. Under the common assumption of uniformly distributed faults, the VLSI arrays are reconstructed in polynomial time using a matching technique first introduced by F.T. Leighton and P.W. Shor (1986). In addition, a randomized method for reducing the maximum wire length and the total wire length is developed and it is shown experimentally that the technique performs better than previous methods.<>