Design and implementation of low cost Hand-held Logic Analyzer

Abstract

This paper presents the design and implementation of a Handheld Logic Analyzer. It is based on the FPGA to capture 9 channel digital data and the ARM7 processor as a master controller, which reads these 9 channel data from the FPGA and sends them to the color graphics LCD to display as 9 channel waveforms. The system features include the ability to capture the data up to 10 MHz and the user can select the data sample rate and also measure the time/period of any of the 9 waveforms. This is a simple, standalone, handheld and cost effective Logic timing Analyzer specifically designed for students, which is easy to use and aids their learning process.