Conditions of CM voltage cancellation in multilevel voltage inverters with conventional and improved carrier-based SVPWM

Abstract

In the paper we have investigated the EMC aspects of the proposed modulation algorithm in the comparison with the conventional carrier-based SVPWM. Our results showed that the choice of this modulation causes that the conditions for the compensation, by means of zero common mode (CM) voltage filter, become more favorable then in a case of the conventional SVPWM. In spite of the fact that frequencies of gate pulses are the same in both modulations, the CM voltage frequency is doubled. The time durations of the CM voltage shelves decreases twice and consequently the time integral value of the CM voltage and the magnetizing current decrease as well. This results in reduction of the size, weight and cost of inductive components of filters in multilevel drives.