Fundamental Power and Frequency Limits of Deeply-Scaled CMOS for RF Power Applications

J. Scholvin, David R. Greenberg, Jesus A. del Alamo
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引用次数: 33

Abstract

This study compares the RF power performance of 65 nm and 0.25 mum CMOS devices integrated on an advanced 65 nm process, and discusses their power and frequency limitations for the first time. The authors demonstrate output power levels of about 80 mW for 65 nm devices, and 450 mW for 0.25 mum devices when operated at their nominal voltages of 1.0 and 2.5 V respectively. The authors find that output power as well as the maximum frequency is limited by parasitic resistances in the backend. The results provide insight into the performance potential of RF power amplifiers integrated into advanced CMOS technologies in SoC applications
射频功率应用中深度缩放CMOS的基本功率和频率限制
本研究比较了采用先进65纳米工艺集成的65纳米和0.25 μ m CMOS器件的射频功率性能,并首次讨论了它们的功率和频率限制。作者演示了分别在1.0 V和2.5 V标称电压下工作时,65 nm器件的输出功率水平约为80 mW, 0.25 nm器件的输出功率水平约为450 mW。作者发现,输出功率和最大频率受到后端寄生电阻的限制。研究结果提供了深入了解集成到先进CMOS技术的射频功率放大器在SoC应用中的性能潜力
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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