{"title":"A 0.6-V 1.8-μW automatic gain control circuit for digital hearing aid","authors":"Yu-Cheng Su, Shuenn-Yuh Lee, Angus Lin","doi":"10.1109/APCCAS.2008.4745973","DOIUrl":null,"url":null,"abstract":"An automatic gain control (AGC) circuit composed of a variable gain amplifier (VGA), a peak detector (PD), and a non-linear controller (NC) for digital hearing aid is proposed. To achieve low power consumption under 0.6-V supply voltage with threshold voltage Vth of 0.5 V, the AGC has been operated in the sub-threshold region with body-driven input. Moreover, the gate-degeneration and bump-circuit techniques are adopted to improve the linearity. The chip has been fabricated in TSMC 0.18-mum standard CMOS process, 52 dB gain range can be achieved under the measured results. Besides, the power consumption of the whole circuit is lower than 1.8 muW under normal conditions and the peak signal to noise ratio (SNR) is 39 dB. The core area of the AGC is 0.933 mm times 0.828 mm.","PeriodicalId":344917,"journal":{"name":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2008.4745973","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
An automatic gain control (AGC) circuit composed of a variable gain amplifier (VGA), a peak detector (PD), and a non-linear controller (NC) for digital hearing aid is proposed. To achieve low power consumption under 0.6-V supply voltage with threshold voltage Vth of 0.5 V, the AGC has been operated in the sub-threshold region with body-driven input. Moreover, the gate-degeneration and bump-circuit techniques are adopted to improve the linearity. The chip has been fabricated in TSMC 0.18-mum standard CMOS process, 52 dB gain range can be achieved under the measured results. Besides, the power consumption of the whole circuit is lower than 1.8 muW under normal conditions and the peak signal to noise ratio (SNR) is 39 dB. The core area of the AGC is 0.933 mm times 0.828 mm.