Chang-Ha Jeon, Jae-Kyung Lee, Dong-Hyun Seo, Jeong-Hun Kim, Jin-Gyun Chung, Chul-Dong Lee
{"title":"Design of weighted interpolation circuit using supplementary filter","authors":"Chang-Ha Jeon, Jae-Kyung Lee, Dong-Hyun Seo, Jeong-Hun Kim, Jin-Gyun Chung, Chul-Dong Lee","doi":"10.1109/SOCDC.2010.5682956","DOIUrl":null,"url":null,"abstract":"Interpolation filters are widely used in many communication and multimedia applications. Recently, FIR interpolation method using supplementary filters was proposed to improve the performances of polynomial interpolation methods. In this paper, we propose a weighted interpolation method using supplementary filter which can be efficiently applied to XRF spectroscopy. It is shown that the proposed method achieves more accurate results compared with conventional interpolation filters with reduced hardware cost. The proposed system is implemented and tested using Altera Excalibur FPGA in an SoC design kit.","PeriodicalId":380183,"journal":{"name":"2010 International SoC Design Conference","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International SoC Design Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCDC.2010.5682956","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Interpolation filters are widely used in many communication and multimedia applications. Recently, FIR interpolation method using supplementary filters was proposed to improve the performances of polynomial interpolation methods. In this paper, we propose a weighted interpolation method using supplementary filter which can be efficiently applied to XRF spectroscopy. It is shown that the proposed method achieves more accurate results compared with conventional interpolation filters with reduced hardware cost. The proposed system is implemented and tested using Altera Excalibur FPGA in an SoC design kit.