Time-interleaved incremental data converters with low oversampling ratios

T. Caldwell, D. Johns
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引用次数: 1

Abstract

Incremental ADCs can operate at lower oversampling ratios than DeltaSigma modulators, resulting in higher input signal bandwidths. In this paper it is shown that time-interleaving can further increase the input signal bandwidth in incremental ADCs to the point that the oversampling ratio is equal to the time-interleaving factor, resulting in no decrease in the allowable input signal bandwidth due to oversampling. This paper investigates some of the advantages and challenges that time-interleaved incremental ADCs offer, and presents an example where a time-interleaved by 4 incremental ADC with an oversampling ratio of 4 can attain a resolution of 12 bits.
具有低过采样比的时间交错增量数据转换器
增量式adc比增量式调制器的过采样率更低,从而获得更高的输入信号带宽。本文表明,时间交错可以进一步增加增量式adc的输入信号带宽,使过采样比等于时间交错因子,而不会因过采样而降低允许的输入信号带宽。本文研究了时间交错增量ADC提供的一些优点和挑战,并给出了一个例子,其中时间交错4个过采样比为4的增量ADC可以获得12位的分辨率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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