M. Jamali, Joseph T. Downey, Nathan Wilikins, C. Rehm, J. Tipping
{"title":"Development of a FPGA-based high speed FFT processor for wideband Direction of Arrival applications","authors":"M. Jamali, Joseph T. Downey, Nathan Wilikins, C. Rehm, J. Tipping","doi":"10.1109/RADAR.2009.4977061","DOIUrl":null,"url":null,"abstract":"A parallel and pipelined Fast Fourier Transform (FFT) processor for use in the Direction of Arrival (DOA) estimation of a wideband waveform is presented. The selected DOA algorithm follows the Coherent Signal Subspace Method (CSSM). The target device for implementation is a Xilinx Virtex-5 Field Programmable Gate Array (FPGA). The FFT processor was developed in MATLAB Simulink using the Xilinx System Generator block-set to auto-generate VHDL code. Although the parallel and pipelined architecture uses a large portion of the available FPGA resources, the architecture does yield a high throughput.","PeriodicalId":346898,"journal":{"name":"2009 IEEE Radar Conference","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Radar Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RADAR.2009.4977061","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
A parallel and pipelined Fast Fourier Transform (FFT) processor for use in the Direction of Arrival (DOA) estimation of a wideband waveform is presented. The selected DOA algorithm follows the Coherent Signal Subspace Method (CSSM). The target device for implementation is a Xilinx Virtex-5 Field Programmable Gate Array (FPGA). The FFT processor was developed in MATLAB Simulink using the Xilinx System Generator block-set to auto-generate VHDL code. Although the parallel and pipelined architecture uses a large portion of the available FPGA resources, the architecture does yield a high throughput.
提出了一种用于宽带波形到达方向估计的并行流水线快速傅里叶变换(FFT)处理器。选取的DOA算法遵循相干信号子空间法(CSSM)。实现的目标设备是Xilinx Virtex-5现场可编程门阵列(FPGA)。FFT处理器在MATLAB Simulink中开发,使用Xilinx System Generator模块集自动生成VHDL代码。虽然并行和流水线架构使用了很大一部分可用的FPGA资源,但该架构确实产生了高吞吐量。