Validation of Turandot, a fast processor model for microarchitecture exploration

Abstract

We describe the results in validating the performance projections from a parameterized trace-driven simulation model of a speculative out-of-order superscalar processor which has been developed with the objective of acting as a microarchitecture exploration tool. Because of its objective, the model-called Turandot-has been designed to deliver much higher simulation speed than what is achieved from detailed (RTL) processor models. We summarize the validation methodology used, and present experimental data gathered in the calibration of one processor organization modeled with Turandot against a detailed reference model. The results indicate that, on the average for SPECint95 sampled traces, Turandot is within 5% of the results reported by the reference model while exhibiting a speed-up factor of about 70.