Automated AC (timing) characterization for digital circuit testing

S. Balajee, A. Majhi
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引用次数: 9

Abstract

One of the major requirements for testing VLSI devices is the validation of its timing specifications. Timing specifications would typically include frequency, propagation delays, minimum pulse width, phase offsets, setup time and hold time measurements. Although parametric specifications may exist for a nominal speed (frequency) of operation of the digital device, it may be necessary to characterize the device under test (DUT) to determine the highest operating frequency of the DUT and the required environmental parameters to run at the highest frequency. Characterization involves measurement of setup time, hold time and pulse width of the signals. In this paper, we have presented an automated AC (timing) characterization flow for digital circuit testing. We have recommended a STIL (Standard Tester Interface Language) like syntax for the timing tests. Various timing data (setup and hold time, propagation delay etc.) are measured in the first pass of the characterization process and are automatically back annotated to the timing test flow to reduce the total test cycle time. The approach will also help in finding the maximum operating frequency of the DUT and speed binning (i.e., sorting the devices based on their operating frequency).
用于数字电路测试的自动交流(定时)特性
测试VLSI器件的主要要求之一是验证其时序规范。定时规格通常包括频率、传播延迟、最小脉冲宽度、相位偏移、设置时间和保持时间测量。虽然数字设备的标称运行速度(频率)可能存在参数规范,但可能有必要对被测设备(DUT)进行表征,以确定DUT的最高工作频率和在最高频率下运行所需的环境参数。表征包括信号的设置时间、保持时间和脉冲宽度的测量。在本文中,我们提出了一种用于数字电路测试的自动交流(时序)表征流程。我们建议使用STIL(标准测试人员接口语言)之类的语法来进行计时测试。各种定时数据(设置和保持时间,传播延迟等)在表征过程的第一次通过中测量,并自动返回注释到定时测试流中,以减少总测试周期时间。该方法还将有助于找到DUT的最大工作频率和速度分组(即根据其工作频率对设备进行排序)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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