An Exploration of Tiled Architectures for Space Applications

Abstract

For many reasons, the chip technology for spacecraft computing has lagged commercial systems by decades. Equally disconcerting, however, has been a similar lag in the computer architectures used. This paper will look at an emerging class of multi-core processor architectures, called “tiled,” extrapolate what they might look like in the future, and how they might be adapted to space applications. This extrapolation will include physical characteristics (speed, power, and area), system architectures, and fault tolerant models