Neural architectures for smart memories in analog VLSI

Abstract

Some basic issues related to the engineering of smart memory systems for intelligent control are discussed. In particular, it is noted that neurally inspired architectures for MOS analog VLSI implementation of smart memories yield highly regular and dense designs with improved performance and low power consumption. These architectures use MOS transistors in the subthreshold region and current-mode circuits. The neural paradigm not only offers insight into the architectures, but also into the actual implementation details. The bidirectional associative memory, the simplest nonlinear two-layer neural network model with feedback, has been implemented on silicon and tested functionally. Associative recall rates of 100000 vectors/s have been obtained with power consumption of a few milliwatts.<>