Gate Insulator Influences on the Electrical Performance of Back-Channel-Etch Amorphous Zinc Tin Oxide (a-ZTO) Thin Film Transistors

Abstract

Back-channel-etch amorphous zinc tin oxide thin film transistors (a-ZTO TFTs) are fabricated with various thicknesses and deposition rates of gate insulator (GI). The devices exhibit a higher field-effect mobility and better electrical stress stability with GI thickness decreasing. Furthermore, field-effect mobility and electrical stress stability can be improved by slow GI deposition rate, caused by smoother GI surface. Moreover, combining with percolation theory, we propose a ZTO carrier transport model to explain the experimental phenomenon. The optimized device exhibits good electrical performances: modest saturation mobility of 10 cm2/Vs, on/off ratio > 108 and subthreshold swing of 0.60V/dec. Besides, Vth shift under negative and positive Vgs is −0.28V and +0.17V, respectively.