A 78 fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO

Zheng Sun, Hanli Liu, Dingxin Xu, Hongye Huang, Bangan Liu, Zheng Li, Jian Pang, T. Someya, A. Shirane
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引用次数: 1

Abstract

This paper presents a low jitter performance and low power consumption injection-locked clock multiplier (ILCM) for IoT application in 65-nm CMOS. A transformer-based ultra-low power (ULP) LC-VCO is proposed to minimize the overall power consumption. The introduced capacitor feedback path boosts the VCO loop gain and thus a robust startup can be obtained. The proposed transformer-based VCO achieves −115.1 dBc/Hz at 1 MHz frequency offset with a 97 μW power consumption, which corresponds to a -194 dBc/Hz VCO figure-of-merit (FoM). Thanks to the proposed low power VCO, the total ILCM achieves 78 fs RMS jitter while consuming 210 μW power. A -269 dB FoMJP of jitter and power is achieved by this proposed ILCM, and a -262 dB FoMJRP is obtained while considering the 520 MHz input reference with multiplication factor equals to 5.
基于变压器的超低功耗压控振荡器的78秒RMS抖动注入锁定时钟乘法器
本文提出了一种低抖动性能和低功耗的注入锁定时钟乘法器(ILCM),用于65纳米CMOS的物联网应用。提出了一种基于变压器的超低功耗(ULP) LC-VCO。引入的电容反馈路径提高了压控振荡器环路的增益,从而实现了稳健性启动。本文提出的基于变压器的VCO在1mhz频偏下实现了- 115.1 dBc/Hz,功耗为97 μW,对应于-194 dBc/Hz的VCO品质系数(FoM)。由于所提出的低功耗压控振荡器,总ILCM在消耗210 μW功率的同时实现了78 fs的RMS抖动。在考虑倍增因子为5的520 MHz输入基准时,该ILCM可实现抖动和功率的-269 dB fomjjp,并可获得-262 dB FoMJRP。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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