A Unified Printed Circuit Board Routing Algorithm With Complicated Constraints and Differential Pairs

Ting-Chou Lin, Devon J. Merrill, Yen-Yi Wu, Chester Holtz, Chung-Kuan Cheng
{"title":"A Unified Printed Circuit Board Routing Algorithm With Complicated Constraints and Differential Pairs","authors":"Ting-Chou Lin, Devon J. Merrill, Yen-Yi Wu, Chester Holtz, Chung-Kuan Cheng","doi":"10.1145/3394885.3431568","DOIUrl":null,"url":null,"abstract":"The printed circuit board (PCB) routing problem has been studied extensively in recent years. Due to continually growing net/pin counts, extremely high pin density, and unique physical constraints, the manual routing of PCBs has become a time-consuming task to reach design closure. Previous works break down the problem into escape routing and area routing and focus on these problems separately. However, there is always a gap between these two problems requiring a massive amount of human efforts to fine-tune the algorithms back and forth. Besides, previous works of area routing mainly focus on routing between escaping routed ball-grid-array (BGA) packages. Nevertheless, in practice, many components are not in the form of BGA packages, such as passive devices, decoupling capacitors, and through-hole pin arrays. To mitigate the deficiencies of previous works, we propose a full-board routing algorithm that can handle multiple real-world complicated constraints to facilitate the printed circuit board routing and produce high-quality manufacturable layouts. Experimental results show that our algorithm is effective and efficient. Specifically, for all given test cases, our router can achieve 100% routability without any design rule violation while the other two state-of-the-art routers fail to complete the routing for some test cases and incur design rule violations.","PeriodicalId":186307,"journal":{"name":"2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-01-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3394885.3431568","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11

Abstract

The printed circuit board (PCB) routing problem has been studied extensively in recent years. Due to continually growing net/pin counts, extremely high pin density, and unique physical constraints, the manual routing of PCBs has become a time-consuming task to reach design closure. Previous works break down the problem into escape routing and area routing and focus on these problems separately. However, there is always a gap between these two problems requiring a massive amount of human efforts to fine-tune the algorithms back and forth. Besides, previous works of area routing mainly focus on routing between escaping routed ball-grid-array (BGA) packages. Nevertheless, in practice, many components are not in the form of BGA packages, such as passive devices, decoupling capacitors, and through-hole pin arrays. To mitigate the deficiencies of previous works, we propose a full-board routing algorithm that can handle multiple real-world complicated constraints to facilitate the printed circuit board routing and produce high-quality manufacturable layouts. Experimental results show that our algorithm is effective and efficient. Specifically, for all given test cases, our router can achieve 100% routability without any design rule violation while the other two state-of-the-art routers fail to complete the routing for some test cases and incur design rule violations.
一种具有复杂约束和差分对的统一印制电路板路由算法
近年来,印刷电路板布线问题得到了广泛的研究。由于不断增长的网/引脚数,极高的引脚密度和独特的物理限制,pcb的手动布线已成为一项耗时的任务,以达到设计闭合。以往的研究将该问题分为逃逸路由和区域路由,并分别进行了研究。然而,这两个问题之间总是存在差距,需要大量的人力来来回调整算法。此外,以往的区域路由工作主要集中在转义路由球网格阵列(BGA)包之间的路由。然而,在实践中,许多元件不是BGA封装的形式,例如无源器件、去耦电容器和通孔引脚阵列。为了弥补以往工作的不足,我们提出了一种全板布线算法,该算法可以处理现实世界中的多种复杂约束,从而促进印刷电路板的布线,并产生高质量的可制造布局。实验结果表明,该算法是有效的。具体来说,对于所有给定的测试用例,我们的路由器可以实现100%的可达性而不违反任何设计规则,而其他两个最先进的路由器在某些测试用例中无法完成路由并导致违反设计规则。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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