{"title":"An All-Digital True Random Number Generator Based on Chaotic Cellular Automata Topology","authors":"S. Best, Xiaolin Xu","doi":"10.1109/iccad45719.2019.8942050","DOIUrl":null,"url":null,"abstract":"True random number generator (TRNG) is an important primitive in cryptographic applications. In this paper, a TRNG based on a self-timed ring structure is presented, the basic elements of the ring is a realization of a chaotic cellular automata topology. In particular, the proposed TRNG design is fully synthesizable with standard all-digital components. Test chips of the proposed TRNG structure were fabricated with 40nm TSMC technology node, and the utilized overhead is only 75 NAND gates equivalent, with a die area of $270 \\mu m^{2}$. Experimental results demonstrated that the TRNG test chips can generate random numbers at a high bit rate: 1600Mb/s. The test sequences generated by the TRNG test chips passed all test statistics of the widely used test suite: NIST SP800-22, as well as the independent and identically distributed (IID) test of NIST SP800-90B.","PeriodicalId":363364,"journal":{"name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/iccad45719.2019.8942050","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
True random number generator (TRNG) is an important primitive in cryptographic applications. In this paper, a TRNG based on a self-timed ring structure is presented, the basic elements of the ring is a realization of a chaotic cellular automata topology. In particular, the proposed TRNG design is fully synthesizable with standard all-digital components. Test chips of the proposed TRNG structure were fabricated with 40nm TSMC technology node, and the utilized overhead is only 75 NAND gates equivalent, with a die area of $270 \mu m^{2}$. Experimental results demonstrated that the TRNG test chips can generate random numbers at a high bit rate: 1600Mb/s. The test sequences generated by the TRNG test chips passed all test statistics of the widely used test suite: NIST SP800-22, as well as the independent and identically distributed (IID) test of NIST SP800-90B.