An FPGA implementation and performance analysis between Radix-2 and Radix-4 of 4096 point FFT

Z. A. Abbas, N. Sulaiman, N. A. M. Yunus, W. Z. Wan Hasan, M. Ahmed
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引用次数: 9

Abstract

The rapid grown in wireless 4G and 5G technology push to the edge to high input data processing. High input data processing required advance Orthogonal Frequency Division Multiplexing (OFDM). The main block in any OFDM transceiver is the Fast Fourier Transform (FFT). FFT consider the transformation bridge between the time and frequency domains. In this research an implementation and direct analysis between radix-2 and radix-4 FFT algorithms presented. Memory-based architecture adopted for the all algorithms. The entire algorithm designed by Altera Quartus II and synthesis for Altera DE2-70 field programmable gate arrays (FPGA) board, in order to investigate and determine the desired algorithm based on the application used for and the system requirement.
4096点FFT的基数2和基数4的FPGA实现及性能分析
无线4G和5G技术的快速发展将高输入数据处理推向了边缘。高输入数据处理需要先进的正交频分复用技术(OFDM)。任何OFDM收发器的主要模块都是快速傅里叶变换(FFT)。FFT考虑了时域和频域之间的转换桥。在本研究中,提出了一种基于基数2和基数4的FFT算法的实现和直接分析。所有算法均采用基于内存的架构。整个算法由Altera Quartus II设计并合成为Altera DE2-70现场可编程门阵列(FPGA)板,以便根据所使用的应用和系统要求调查和确定理想的算法。
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