MRAM DTCO and Compact Models

Abstract

Design-Technology Co-Optimization (DTCO) has become an important design methodology for making early decisions on technology, circuit, and system design parameters. This invited paper introduces various aspects of DTCO for MRAM development, ranging from SPICE compatible Magnetic Tunnel Junction (MTJ) device models, array level spin transfer torque magnetoresistive random access memory (STT-MRAM) power-performance-area (PPA) evaluation, scalability and variability studies of large-scale arrays, and novel read and write circuit techniques.