{"title":"Efficient Class of Redundant Residue Number System","authors":"S. Timarchi, K. Navi","doi":"10.1109/WISP.2007.4447506","DOIUrl":null,"url":null,"abstract":"The residue number system is suitable for implementing high-speed digital processing devices because it supports parallel, modular, fault-tolerant and carry-bounded arithmetic. The carry propagation is restricted to inside the modulus. The remaining intra moduli carry propagation limits the speed of arithmetic operation. Therefore the carry-free property of redundant arithmetic can be used. In this paper, we discuss a novel class of redundant high-radix RNS based on the stored-unibit transfer representation for modulo 2n+1 that improves the performance of conventional redundant RNS and provides a desired tradeoff between area and delay complexity.","PeriodicalId":164902,"journal":{"name":"2007 IEEE International Symposium on Intelligent Signal Processing","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"22","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE International Symposium on Intelligent Signal Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WISP.2007.4447506","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 22
Abstract
The residue number system is suitable for implementing high-speed digital processing devices because it supports parallel, modular, fault-tolerant and carry-bounded arithmetic. The carry propagation is restricted to inside the modulus. The remaining intra moduli carry propagation limits the speed of arithmetic operation. Therefore the carry-free property of redundant arithmetic can be used. In this paper, we discuss a novel class of redundant high-radix RNS based on the stored-unibit transfer representation for modulo 2n+1 that improves the performance of conventional redundant RNS and provides a desired tradeoff between area and delay complexity.