G. Signorini, C. Siviero, I. Stievano, S. Grivet-Talocia
{"title":"Enhanced macromodels of high-speed low-power differential drivers","authors":"G. Signorini, C. Siviero, I. Stievano, S. Grivet-Talocia","doi":"10.1109/EDAPS.2016.7874401","DOIUrl":null,"url":null,"abstract":"High-speed differential interfaces implementing specific solutions for low-power consumption and low-EMI disturbances are vastly used in mobile platforms. In these devices, the slew rate is suitably controlled, the communication scheme alternatas data-bursts followed by power-saving states, the voltage swing and the common-mode level are reduced. To achieve these targets, a key role in voltage-mode output drivers is played by an internal voltage-regulator. The latter exhibits a rich dynamic behavior, with non-negligible effects on the transmitter outputs, that need to be carefully characterized. In this paper, a modeling strategy based on a few key enhancements of state-of-the-art solutions is presented, leading to compact and accurate models. The feasibility and strengths of the proposed approach are verified on a low-power high-speed voltage-mode driver.","PeriodicalId":191549,"journal":{"name":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","volume":"282 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAPS.2016.7874401","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
High-speed differential interfaces implementing specific solutions for low-power consumption and low-EMI disturbances are vastly used in mobile platforms. In these devices, the slew rate is suitably controlled, the communication scheme alternatas data-bursts followed by power-saving states, the voltage swing and the common-mode level are reduced. To achieve these targets, a key role in voltage-mode output drivers is played by an internal voltage-regulator. The latter exhibits a rich dynamic behavior, with non-negligible effects on the transmitter outputs, that need to be carefully characterized. In this paper, a modeling strategy based on a few key enhancements of state-of-the-art solutions is presented, leading to compact and accurate models. The feasibility and strengths of the proposed approach are verified on a low-power high-speed voltage-mode driver.