An Open-Source $4 \times 8$ Coarse-Grained Reconfigurable Array Using SkyWater 130 nm Technology and Agile Hardware Design Flow

Abstract

With the end of Dennard scaling, hardware specialization has been broadly adopted in computing systems to improve performance and energy-efficiency. However, specialized hardware deprecates soon after new algorithms are introduced. A coarse-grained reconfigurable array (CGRA) offers the programmability required for accommodating application changes, while still being more efficient than FPGAs and GPUs. This work presents a $4\times 8$ CGRA created using an open-source agile hardware-compiler co-design framework. This is the first CGRA chip designed using the open-source SkyWater 130nm technology and OpenRAM memory compiler. We present the CGRA architecture, implementation results, and silicon validation results to verify the technology portability of agile hardware design framework.