Optically Controllable Pixel Based On Vertical To Surface Transmission Electro-photonic Devices Using Four-terminal Pnpn Structure

I. Ogura, A. Yasuda, M. Sugimoto, T. Numai, M. Nishio, K. Kasahara
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引用次数: 2

Abstract

Surface-Emitting-Laser-based optical functional devices have promising features for photonic switching and optical data processing. All photonic switching networks need control signals to be sent into the nodes to allow for appropriate routing of traffic.') Control injection, thus, must be taken into consideration more in photonic switches. An optical self-routing switch has been proposed where a node consists of pnpn-Vertical to Surface Transmission ElectroPhotonic Devices with Vertical Cavities (VC-VSTEPS).~) The routing for optical data signals are controlled by an optical pilot signal placed at the head of the optical data signals. However, this switch still needs electric timing signals to be applied to the VC-VSTEPs, which might cause electromagnetic interferences among a large number of internal electric lines, and a delay in the timing signals due to parasitic capacitances. Therefore, it is desirable that the timing signals are further injected optically. This paper reports on VSTEP-based pixels aiming for optically controllable nodes. The pixel consists of a VSTEP using a four-terminal pnpn structure with two distributed Bragg reflectors (DBRs) (Fig. 1). The fabrication process includes two-step mesa etching: 1) to the n-doped gate layer, and 2) to the n-doped DBR layer. The n- and p-gate electrodes are formed on the second mesa with Zn diffusion for the p-gate. In comparison to twoterminal VC-VSTEPs3), the structure provides variable switching voltage characteristics and gate turn-off operation by means of carrier injectiodextraction through the gate terminals. Also, this structure allows the formation of a hetero-junction bipolar transistor (HBT), or a hetero-junction photo-transistor (HPT) together with the pnpn-structure. These two features, in combination, expand flexibility in device configuration to meet the demands of photonic switching and processing systems. As an example, a pixel has been demonstrated for an optical self-routing switch with optical gating and optical reset operations. Figure 2 shows an equivalent circuit of the pixel. When the optical gate pulse is incident on the HFT1, current is injected to the pnpn device, resulting in a reduction of switching voltage, and allowing turn-on by the input optical pulse. Applying the gate pulses to the pixels with proper time delays, the pilot signal can select one pixel in which the pilot signal coincides with the gate signal. "2 is used for the optical reset. The optical reset pulse incident on the HPT2 removes the stored charge in the pnpn-device through the ngate. Figure 3 shows voltage-current and light-current characteristics of the fabricated device with various current injections from the n-gate. The switching voltage without n-gate injection is 3.8 V and the threshold current is 35 mA. A common-emitter current gain of 180 is obtained for the npn-HPT using an n-gate as a collector and a cathode as an emitter. Figure 4(a) shows the optical gating operation. A bias voltage of 3V was applied to the anode. The reset is also achieved as shown in Fig. 4(b). Optical energies obtained for the input, gate and reset are 8.0 pJ, 0.5 pJ and 10 pJ, respectively. Reduction in these values will be achieved by a decrease in device size.
基于四端Pnpn结构的垂直到表面传输光电器件的光学可控像素
基于表面发射激光的光学功能器件在光子开关和光数据处理方面具有广阔的应用前景。所有的光子交换网络都需要将控制信号发送到节点,以允许适当的流量路由。因此,在光子交换中必须更多地考虑控制注入。提出了一种光自路由交换机,其中一个节点由pnpn-垂直腔的垂直到表面传输电泳器件(VC-VSTEPS)组成,光数据信号的路由由放置在光数据信号头部的光导信号控制。但是该开关仍然需要在VC-VSTEPs上施加电定时信号,这可能会导致大量内部电线之间的电磁干扰,并且由于寄生电容导致定时信号延迟。因此,希望将时序信号进一步以光学方式注入。本文报道了一种基于vstep的像素瞄准光可控节点。像素由一个VSTEP组成,该VSTEP采用带有两个分布式Bragg反射器(DBR)的四端pnpn结构(图1)。制作过程包括两步平台蚀刻:1)到n掺杂栅极层,2)到n掺杂DBR层。n栅极和p栅极电极在第二台面上形成,p栅极用Zn扩散。与双端vc (vste3)相比,该结构提供可变开关电压特性和栅极关断操作,通过栅极终端注入载波。此外,该结构允许与pnpn结构一起形成异质结双极晶体管(HBT)或异质结光电晶体管(HPT)。这两个特性结合在一起,扩展了器件配置的灵活性,以满足光子开关和处理系统的需求。作为一个例子,已经演示了一个具有光门控和光复位操作的光自路由开关的像素。图2显示了该像素的等效电路。当光门脉冲入射到HFT1上时,电流被注入到pnpn器件中,导致开关电压降低,并允许输入光脉冲导通。将导频脉冲施加到具有适当延时的像素上,导频信号可以选择一个导频信号与门信号重合的像素。“2”用于光复位。入射到HPT2上的光复位脉冲通过栅极除去pnpn器件中存储的电荷。图3显示了从n栅极注入不同电流时所制备器件的电压-电流和光电流特性。无n栅注入的开关电压为3.8 V,阈值电流为35 mA。使用n栅极作为集电极,阴极作为发射极,npn-HPT的共发射极电流增益为180。图4(a)显示了光选通操作。在阳极上施加3V的偏置电压。复位的实现如图4(b)所示。输入、栅极和复位获得的光能分别为8.0 pJ、0.5 pJ和10 pJ。这些值的减少将通过减小器件尺寸来实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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