{"title":"A platform-based de-blocking filter design with bus-interleaved architecture for H.264","authors":"Shih-Chien Chang, Wen-Hsiao Peng, Shih-Hao Wang, Tihao Chiang","doi":"10.1109/ICCE.2005.1429833","DOIUrl":null,"url":null,"abstract":"We present an ARM platform-based architecture design for the de-blocking filter in H.264. According to statistical analysis, we propose an adaptive transmission scheme to reduce the bus workload. Moreover, we develop a bus-interleaved architecture to reduce the processing latency. As compared to the state-of-the-art designs, our scheme offers 3/spl times/ to 14/spl times/ performance improvement. Furthermore, we have proved our design using an ARM emulation board.","PeriodicalId":101716,"journal":{"name":"2005 Digest of Technical Papers. International Conference on Consumer Electronics, 2005. ICCE.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 Digest of Technical Papers. International Conference on Consumer Electronics, 2005. ICCE.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE.2005.1429833","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
We present an ARM platform-based architecture design for the de-blocking filter in H.264. According to statistical analysis, we propose an adaptive transmission scheme to reduce the bus workload. Moreover, we develop a bus-interleaved architecture to reduce the processing latency. As compared to the state-of-the-art designs, our scheme offers 3/spl times/ to 14/spl times/ performance improvement. Furthermore, we have proved our design using an ARM emulation board.