Mailbox based inter-processor communication in SoC

Abstract

An inter-processor communication scheme is necessary in a multi-core system-on-chip architecture, for data communication, event control and resource sharing which are necessary for efficient performance of SoC. This paper presents the implementation of inter-processor communication using hardware based mailbox and semaphore design. Data communication and event control between processors are accomplished through mailbox and synchronization in resource sharing is achieved with semaphore. Both the schemes are implemented in RTL, simulated and verified using VCS of Synopsys.