Wei-Zen Chen, Jia-Xian Chang, Ying-Jen Hong, M. Wong, Chien-Liang Kuo
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引用次数: 5
Abstract
This paper describes the design of a CMOS frequency synthesizer for 2.3/4.6 GHz wireless applications. This synthesizer provides dual band output signals by means of a novel frequency doubling technique. Output frequency of the proposed synthesizer ranges from 1.87 GHz-2.3 GHz and 3.74 GHz-4.6 GHz. Fabricated in a 0.35 /spl mu/m CMOS process, this chip consumes a total power of 80 mW from a single 2 V supply. Chip size is 3210 /spl mu/m/spl times/2410 /spl mu/m.