A Low Power ASK Clock and Data Recovery Circuit for Wireless Implantable Electronics

Abstract

This paper describes a low power clock and data recovery (CDR) circuit with integrated ASK demodulator for wireless implantable neural recording microsystems. A modulation scheme based on amplitude shift-keying (ASK) and pulse position modulation (PPM) is employed to simplify the complexity of implant circuits and reduce power transmission requirements. A charge-pump based CDR circuit is used to extract non-return to zero data from the demodulated waveforms. A prototype has been fabricated in 2-poly 3-metal 0.6mum bulk CMOS technology in order to validate circuit functionality. The receiver front-end exhibits a sensitivity of 3.2mV p-p at 1MHz. The ASK demodulator and CDR operates over an input data range of 4kbs to 18kbs, measures 300pm by 600pm and dissipates 70pW from a 2.7V supply